AutoC Empowers ST SR6P3ECR52 MCAL Configuration (Part 2): Hands-on ADC/ICU and a Complete Guide to LIN/UART/SPI/DMA

1. Batch synchronize all SARADC pins in PORT

After issuing the configuration SARADC command, AutoC will automatically traverse all the pins of the PORT module, filter and label SARADC, simulate the input signal, and completely migrate it to the ADC driver. It will automatically create hardware units, assign unique channel IDs, and synchronize pin naming, eliminating the need for engineers to manually create new channels one by one. At the same time, the system will automatically divide ADC groups according to hardware units, and the default unified configuration is software single trigger and 12-bit sampling accuracy.

Figure 1: Adc channel group naming list

2、Customize on demand: distinguish between current sampling hardware triggers and other channel software triggers

After the basic channel is generated, hierarchical triggering requirements are issued through natural language dialogue: the motor current sampling channel enables GTM hardware trigger mode, and the temperature and voltage conventional detection channels adopt software single triggering.

Figure 2: ADC hardware channel group naming summary list

Figure 3: Adc hardware unit grouping in EB project

Figure 4: Adc sampling trigger grouping in EB project

1. Automatically map 14 GTM_TIM hardware channels, with dual edge detection by default;

2. Support batch parameter modification: all instructions can be changed to falling edge trigger (fault signal is low and active) with one click, and all channels can be updated synchronously without error.

Figure 5: Icu channel hardware mapping list

Figure 6: Icu batch modification falling edge completion result

Figure 7: EB Engineering Icu configuration interface

The LINFlexD peripheral of this chip reuses the LIN host channel and UART controller at the same time, and can issue instructions at one time to complete the configuration of two types of communication peripherals in batches.

1. Clock source selection logic

AI confirms the legal clock reference source in three steps:

①Read all available clock enumeration candidate lists in the EB project;

② Match the auxiliary clock table in the chip RM manual and lock LIN_CLK as the exclusive input clock of LINFlexD;

③Verify whether the LIN_CLK frequency in the MCU clock tree does not exceed the maximum value allowed by the hardware: 100MHz to ensure clock consistency between modules.

Figure 1: Complete process of Lin/Uart clock source matching

2. Communication parameter value basis

Automatic filling of standard parameters: Industry common values will be used when there are no special requirements:

①LIN: 19200bps (LIN2.x mainstream automotive baud rate), 13-bit synchronization interval, forced MASTER host mode (hardware does not support slave);

②UART: 115200bps, 8 data bits + no parity + 1 stop bit (standard 8N1 serial port format).

All parameters are marked as items to be confirmed, and you can inquire about the basis for the values.

Figure 2: Lin&Uart complete configuration details

Figure 3: EB project Lin/Uart configuration interface

1. Hardware unit identification and equipment allocation

Identify 4 physical SPI units and 7 CS signals, split 7 chip-select communication links, and generate the "1Seq-1Job-1Channel" standard architecture by default, uniformly using 1MHz SPI Mode0 parameters.

Figure 4: Overview of overall SPI configuration

2. Added driver chip knowledge base, automatic timing adaptation

After importing the L9502E driver manual, AI will automatically match the hardware timing: 24bit frame, 5MHz, CPOL=0/CPHA=0, low effective chip select, automatically correct the SPI basic parameters synchronously, and verify the timing margin item by item to meet the minimum requirements of the manual.

Figure 5: L9502E SPI parameter matching comparison table

3. Batch adjustment of customized requirements

The engineer issued personalized requirements: reduce the frequency to 2MHz, change the channel from IB to EB cache, AI simultaneously adjusts the supporting parameters of SpiChannelType and SpiChannelBuffersAllowed, and generates a complete change list.

Figure 6: SPI parameter modification change list

1. Unify and standardize the configuration process

Turn on peripheral DMA, no manual bidirectional modification is required, AI will automatically complete the configuration of both ends:

① The peripheral side automatically turns on the TX/RX DMA global enablement and switches the transmission mode to DMA;

②Retrieve the chip SR6P3_DAMUX mapping table and match the DMA hardware controller and source slot to which the peripheral belongs;

③ Automatically create idle TX/RX channels in the DMA module, assign legal channel IDs, and bind peripheral FlowControl signals;

④ Establish a bidirectional reference between peripherals and DMA, and verify that the channel number falls within the legal range of the controller to avoid resource conflicts.

2. Two major peripheral practical cases

①SPIQ3 enables DMA: matches the DMA_SYS_3 controller and automatically assigns RX channel 96 and TX channel 97;

②LINFlex2 (UART) enables DMA: matches the DMA_SYS_2 controller and automatically allocates RX channel 80 and TX channel 81; the entire set of DMA allocation links is completely traceable, and engineers can retrieve the DMAMUX manual form for double verification to verify the rationality of resource allocation.

Figure 7: SPI DMA configuration summary

Figure 8: UART DMA configuration summary

Figure 9: EB SPI final configuration diagram

Figure 10: EB SPI final configuration diagram

Traditional Git traceback has shortcomings such as cumbersome version submission and only supports full version rollback. AutoC has a built-in independent change management module. Each round of configuration generates a structured change list, clearly displaying each parameter's "original value → new value" and the module level to which it belongs. Two fallback modes can flexibly adapt to various debugging scenarios:

1. Global rollback: If all configurations in this round do not meet expectations, restore the pre-operation project with one click;

2. Single accurate rollback: only individual erroneous parameters are revoked, and the rest of the automated configuration is completely retained, without the need to repeat the full generation.

Figure 11: Configuration change and rollback interface

● Significantly reduce costs and increase efficiency:

MCU/PORT/DIO/ADC/LIN/SPI/ICU/DMA All-module natural language batch generation, eliminating manual reading, manual calculation, cross-module repeated configuration and other work steps;

● Configuration can be reviewed and learned:

All parameters support traceability query, and manual chapters + EB plug-in formulas can be output, so newcomers can quickly master the standard MCAL configuration ideas;

● Deep linkage of peripherals:

PORT↔ADC/DMA↔SPI/UART bidirectional correlation and automatic synchronization to eliminate missed and mismatched matches;

● Flexible customization:

The default industry standard configuration supports the delivery of personalized requirements (clock frequency, trigger mode, SPI cache type, etc.);

● Independent fallback system:

You can view changes, local/global rollbacks without leaving Git, and the efficiency of debugging and iteration is greatly improved;

● Vehicle regulations compliance:

All configurations rely on the original RM manual and EB plug-in native enumeration, without illegal parameters, and meet the automotive electronic control project development specifications.

Zhongke Yichuang (Guangzhou) Technology Co., Ltd. was incubated and established by the Greater Bay Area Integrated Circuit Research Institute. It is a key investment incubation project of the Chinese Academy of Sciences and has received key support from the Guangdong Provincial and Municipal Governments. The company has won many honors such as National High-tech Enterprise, Guangdong Province Specialized and New Enterprise, and Guangdong Province Top 100 Hard Technology Enterprises.

Currently, Zhongke Yichuang has its Guangzhou headquarters, Wuxi manufacturing base, Shanghai branch and Wuhan delivery center. The company focuses on the development of power bricks, motor controllers and domain controllers in the field of new energy vehicles. It not only obtained the first ASIL-D SiC motor controller product certification in China, but also passed many authoritative vehicle-level qualification certifications such as IATF16949, ASPICE L2, ISO9001, etc., showing strong system strength. In addition, the company has a complete set of capabilities in software, hardware, structure, testing, production and manufacturing, and has been recognized and praised by many OEMs.